 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| A/D, D/C Converters for Image Signal Processing MN65771F Low Power 10-Bit 5 V CMOS A/D Converter for Image Processing Overview The MN65771F is a high-speed 10-bit CMOS analogto-digital converter for image processing applications. It uses a half flash structure based on chopper comparators to achieve both high speed and low power consumption. Pin Assignment N.C. VRBS VRB VR3 VR2 VR1 VRT VRTS N.C. AVSS AVDD AVDD Features Maximum conversion rate: 18 MSPS (min.) Linearity error: 1.3 LSB (typ.) Differential linearity error: 1.0 LSB (typ.) Power supply voltage: 5.0 V or 3.3 V Power consumption: 115 mW (typ.) (fCLK=20 MHz) Digital television receivers Digital video equipment Digital image processing equipment D0 D1 D2 D3 D4 DVSS DVDDL D5 D6 D7 D8 D9 Applications 1 2 3 4 5 6 7 8 9 10 11 12 N.C. AVDD VIN N.C. N.C. N.C. AVSS DVSS DVDD LINDF OVF N.C. 37 38 39 40 41 42 43 44 45 46 47 48 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 POWD NOE CLK MINV LINV N.C. DVDD DVSS DVSS DVDD TEST1 TEST2 (TOP VIEW) QFH048-P-0707 1 2 MN65771F Block Diagram UNDF OVF D0(LSB) D1 D2 3 2 1 47 45 46 DVDD 44 DV SS 43 AV SS 39 V IN 38 AV 35 34 33 31 31 DD VRBS VRB Upper encoder (5 bits) Upper comparator (5 bits) D3 4 5 D4 6 DVSS 7 DV DDL D5 D6 9 8 VR3 32 V R2 31 VR1 30 VRT 29 V 27 RTS Clock generator 5 Lower comparator (5 bits) 57 10 D7 11 D8 12 D9 13 TEST2 14 TEST1 15 DVDD 16 DVSS 17 DVSS 18 DVDD 22 CLK NOE 23 Lower encoder (5 bits) 5 29 AVSS 26 AV DD 25 AV DD 21 20 MINV LINV ( Pin NO. A/D, D/C Converters for Image Signal Processing Error correction and data latch 19, 28, 36, 37, 40, 41, 42, 48 are N.C.pin. POWD 24 ) A/D, D/C Converters for Image Signal Processing Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Symbol D0 D1 D2 D3 D4 DVSS DVDDL D5 D6 D7 D8 D9 TEST2 TEST1 DVDD DVSS DVSS DVDD N.C. LINV MINV CLK NOE POWD AVDD AVDD AVSS N.C. VRTS VRT VR1 VR2 VR3 VRB VRBS N.C. N.C. AVDD VIN N.C. Function Description Digital code output (LSB) Digital code output Digital code output Digital code output Digital code output Ground for digital circuits Power supply for digital circuits Digital code output Digital code output Digital code output Digital code output Digital code output Test mode selection Test mode selection Power supply for digital circuits Ground for digital circuits Ground for digital circuits Power supply for digital circuits No connection Output inversion Output inversion Sampling clock Digital output enable Power down mode selection Power supply for analog circuits Power supply for analog circuits Ground for analog circuits No connection Reference voltage power supply (TOP) Reference voltage input (TOP) Intermediate reference voltage Intermediate reference voltage Intermediate reference voltage Reference voltage input (BOTTOM) Reference voltage power supply (BOTTOM) No connection No connection Power supply for analog circuits Analog signal input No connection MN65771F 3 MN65771F Pin Descriptions (continued) Pin No. 41 42 43 44 45 46 47 48 Symbol N.C. N.C. AVSS DVSS DVDD UNDF OVF N.C. A/D, D/C Converters for Image Signal Processing Function Description No connection No connection Ground for analog circuits Ground for digital circuits Power supply for digital circuits Underflow output Overflow output No connection Ta=25C Absolute Maximum Ratings Parameter Power supply voltage Input voltage Output voltage Operating ambient temperature Storage temperature Parameter Power supply voltage Symbol VDD VI VO Topr Tstg Symbol VDD DVDDL VIH VIL VRT VRB tWH tWL VAIN Symbol Conditions PC FC=20MSPS 25 25 VSS min 4.50 3.00 2.4 VSS Rating - 0.3 to +7.0 - 0.3 to VDD +0.3 - 0.3 to VDD +0.3 -20 to +70 -55 to +125 typ 5.00 3.30 max 5.50 5.50 VDD 0.8 4.0 2.0 Unit V V V C C Unit V V V V V V ns ns VDD V Unit mW bit 2.5 1.5 LSB LSB MSPS 18 VRT - VRB -1.5 MHz V mA mA 20 15 7 30 ns pF ns Recommended Operating Conditions VDD=AVDD=DVDD=5.0V, DVDDL=3.3V, VSS=AVSS=DVSS=0V, Ta=25C Power supply voltage for digital output circuits Digital input voltage "H" level "L" level "L" level Clock "H" level pulse width "L" level pulse width Analog input voltage Reference voltage "H" level Electrical Characteristics Parameter Power consumption Resolution Linearity error Differential linearity error Maximum conversion rate Clock frequency Analog input dynamic range Output current "H" level "L" level VDD=AVDD=DVDD=3.0V, AVSS=DVSS=0V, Ta=25C min typ 115 10 max 200 (not including reference current) RES EL ED FC(max.) fCLK DR IOH IOL td CI tsd VOH=VDD - 0.8V VOL=0.4V CL=20pF 1.5 10 fCLK=18MSPS VRT=4.0V VBB=2.0V 18 1 2 1.3 1.0 Output delay time Analog input capacitance Sampling delay 4 A/D, D/C Converters for Image Signal Processing Timing Chart MN65771F The chip samples the analog input at the falling edge of the clock signal and provides the corresponding digital output 2.5 clock cycles later at the rising edge of the clock signal. tWH Clock tWL Analog input N tsd(7ns) N+1 N-2 td(20ns) N+2 N-1 N+3 N N+4 N+1 Data output N-3 Note: The circles indicate analog signal sampling points. 5 MN65771F Package Dimensions (Unit:mm) QFH048-P-0707 A/D, D/C Converters for Image Signal Processing 9.00.2 7.00.2 36 25 (0.75) 7.00.2 37 24 48 13 1 (0.75) 0.5 12 0.20.1 (1.0) 2.9 max. 2.50.2 +0.10 -0.05 9.00.2 0.15 0.10.1 0.1 SEATING PLANE 0.50.2 0 to 10 6 |
Price & Availability of MN65771F
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |